d0810 sy 20101125-s00002 no.a1899-1/6 any and all sanyo semiconductor products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. consult with your sanyo semiconductor representative nearest you before using any sanyo semiconductor products described or contained herein in such applications. sanyo semiconductor assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all sanyo semiconductor products described or contained herein. LV5710GP overview the LV5710GP is power supply for charge pump for camera sensor. functions ? regulating the 5v input by boosting it three-fold with the charge pump to the specified voltage. ? output voltage variable with external resistor. ? soft start function incorporated, which reduces the rush current at start of charge pump. ? timer-latch type short-circuit protective function incorporated. specifications absolute maximum ratings at ta = 25 c parameter symbol conditions ratings unit maximum supply voltage v dd max 6.0 v allowable power dissipation pd max with specified substrate * 0.55 w operating temperature topr -20 to +80 c storage temperature tstg -40 to +125 c * : specified substrate : 114.3mm 76.1mm 1.6mm, glass epoxy board allowable operating ratings at ta = 25 c ratings parameter symbol conditions min typ max unit supply voltage v dd 4.5 5.5 v input ?h? voltage v in h en pin 1.5 v dd v input ?l? voltage v in l en pin -0.1 0.4 v bi-cmos lsi for camera sensor power supply for charge pump orderin g numbe r : ena1899
LV5710GP no.a1899-2/6 electrical characteristics at ta = 25c, v dd = 5v, i out = 30ma, s0 = l, s1 = l, unless otherwise specified ratings parameter symbol conditions min typ max unit i dd 1 en = l 1 a circuit current drain i dd 2 en = h no load 12 18 ma output load current i o ave at v out = 12v setting 30 ma v dd = 4.5 to 5.5v 1.285 1.305 1.325 v reference voltage vref ta = -20c to +80c, design value 1.279 1.331 v output voltage at off v off after capacitive discharge -50 0 50 mv protective circuit masking time tmask masking time from detection of short-circuit to ic off 18 33 ms short-circuit protective current i lim 35 50 65 ma short-circuit protective voltage v lim 82.5 87.5 92.5 % ss end time t ssend time from en = h to regulator ss off ta = -20c to +80c design value 10 ms ro load regulation ro load 1ma 30ma 30 40 mv pins en 30 40 50 a input pin current iin s0 and s1 pins 1 a power efficiency peff cp+regulator 70 % rush current irush no load 300 ma oscillation frequency f clk 1.4 1.8 2.3 mhz package dimensions unit : mm (typ) 3368 pd max -- ta ambient temperature, ta ? c allowable power dissipation, pd max ? w 0 0.2 0.4 0.6 0.55 0.8 ? 20 80 0.25 60 20 40 010 0 mounted on a substrate : 114.3 76.1 1.6mm 3 glass epoxy sanyo : vct20(3.0x3.0) 0.4 3.0 3.0 0.8 (0.035) top view side view side view bottom view 0.25 0.5 (0.5) (c0.17) 1 2 20 (0.125) (0.13)
LV5710GP no.a1899-3/6 pin assignment pin function pin no. name function 1 cpo boost voltage output (6v dd or 5v dd ) 2 nc 3 c2p boost capacitor connection pin (charge transfer side) 4 nc 5 c1p boost capacitor connection pin (charge transfer side) 6 pv dd power system v dd pin 7 nc 8 c2m boost capacitor connection pin (driver side) 9 c1m boost capacitor connection pin (driver side) 10 pgnd power gnd pin for the charge pump 11 nc 12 sgnd small signal system gnd pin 13 s0 charge pump frequency changeover pin 14 test test pin (open or short-circuited to gnd) 15 s1 charge pump frequency changeover pin 16 sv dd small signal system v dd pin 17 en system enable pin (hi active) 18 fb regulator fb pin 19 ro regulator output pin 20 nc top view LV5710GP cpo 1 20 16 17 18 19 6 10 9 8 7 2 3 4 5 11 12 13 14 15 nc c2p pv dd nc c1p pgnd nc c2m c1m nc sv dd nc ro fb en s1 s0 test sgnd
LV5710GP no.a1899-4/6 block diagram equivalent circuit diagram + vref cpo - + - + - c2p 3v in +3v in vou t ro fb 2v in v in m3 m2 m1 pv dd v in = 4.5v to 5.5v clk c1p c1m c2m pv dd pgnd sv dd sgnd s0 s1 en active bandgap voltage reference timing control 2bit mux divider 2mhz osc c2m c1m c1p c2p cpo fb - + 1 f 1 f 4.7 f 1 f 0.22 f ro vref step-up circuit sequence control block
LV5710GP no.a1899-5/6 output voltage setting method the output voltage of ic-incorporated ldo can be determined as follows : vh = r1+r2 r2 vref for example, to set the output voltage to 12v, set the resistance value to r1 = 1070k /r2 = 130k . short-circuit protective operation the ro output pin has the short-circuit protective function. the over-current detector circuit outputs the detection signal when the output current of 50ma (typ) or more flows or when the output voltage drops below 87.5% (typ). when this detection signal is output continuously for 18ms (typ) or more, ic determines that there is over-current and stops the output. to reset from the stop state, set the en pin to ?l?, then set the en pin to ?h? again. equivalent circuit of the over-current detection circuit selecting the frequency according to the logic of s0 and s1, the charge pump operation frequency can be changed. in the case of light load, the r eactive power can be reduced by d ecreasing the operating frequency. s0 s1 cp operating frequency l l 1mhz h l 500khz l h 250khz h h 125khz ro cpo fb r1 r2 vref = 1.3v + vref - fb ro cpo output voltage detection comparator short-circuit detection signal output current detection comparator + 0.875 vref -
LV5710GP ps no.a1899-6/6 specifications of any and all sanyo semiconductor products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. sanyo semiconductor co., ltd. strives to supply high-quality high-reliability products. however, any and all semiconductor products fail with some probability. it is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. when designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. in the event that any or all sanyo semiconductor products (including technical data,services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of sanyo semiconductor co., ltd. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equipment, refer to the "delivery specification" for the sanyo semiconductor product that you intend to use. information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. sanyo semiconductor believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. startup sequence en pin and v dd the sequence operation is made at startup. however, startup is not made when the internal circuit has not been reset. to reset the internal circuit, keep the en pin to ?l? till v dd becomes 4.5v or more. note that v dd and en pin cannot be short-circuited for this purpose. this catalog provides information as of december, 2010. specifications and inform ation herein are subject to change without notice. frequency selection s0 v dd en charge pump output cpo regulator output ro * cp clock 1mhz * cp clock 500khz * cp clock 250khz * cp clock 125khz * ic internal signal start at 1mhz steady operation start at 1mhz ss end 10ms (max) ss end 10ms (max) steady operation do not allow the signal to change frequency selection frequency selection do not allow the signal to change frequency selection do not allow the signal to change frequency selection frequency selection do not allow the signal to change s1 set en = h after setting v dd = 4.5v or more never allow v dd to decrease below 4.5v till en = l is established stop with en = l or for over- current protection
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